1. Field of the Invention
The present invention relates to logic circuits, and particularly to logic circuits able to suppress fluctuation of electrical power consumption.
2. Description of the Related Art
Due to recent advancements in LSI technology, a great quantity and variety of semiconductor devices have come to be widely used not only for application in information systems, but also in industrial equipment, and consumer home-electronics.
Also, due to the shift to high-performance semiconductors, the electrical power consumption thereof is growing. The increase in electrical power consumption leads not only to problems of heat generation in semiconductor devices, but also to a decrease in the continuous operation time of batteries for battery-operated products, which makes lengthy continuous use of these semiconductor device-employing products impossible.
A great quantity of logic circuits for realizing various functions are contained within semiconductor devices. There are various kinds of logic circuits such as general AND circuits, exclusive OR circuits, adders, and the like.
However, since in recent years the basic unit of data processing has grown to large bit counts including 32 bit and 64 bit, there are cases in which the electrical power consumption fluctuates greatly in response to changes in simultaneously processed data. In Japanese Patent Laid-Open No. 2000-216264 for instance, there is a proposal relating to technology of low electrical power consumption in semiconductor circuits.
For this reason, there has been a problem of it being necessary to perform power circuit design in consideration of a maximum value and a minimum value that occur in electrical power consumption fluctuation that corresponds to the above mentioned changes in data.